Architecture of the multi-tap-delay-line time-interval measurement module implemented in FPGA device
Article Sidebar
Main Article Content
Article Details
Com citar
Zielinsk, Marek et al. “Architecture of the multi-tap-delay-line time-interval measurement module implemented in FPGA device”. Instrumentation viewpoint, no. 14, https://raco.cat/index.php/Instrumentation/article/view/298032.